Senior Principal Digital Design Engineer

1 day ago

Brno, South Moravian, Czech Republic onsemi Full time 90,000 - 120,000 per year
Description

About the Role

At onsemi, we help improve lives through silicon solutions every day. Our intelligent power and sensing technologies solve the world's most complex challenges and lead the way in creating a safer, cleaner, and smarter world. Join onsemi's New Product Development team in Brno, Czech Republic, where we define, design, and validate cutting-edge analog-digital integrated circuits. Our focus is on high-performance sensor interfaces, drivers, and communication circuits, primarily for the automotive industry.

We are looking for a Senior Principal Digital Design Engineer to join our team and contribute to our successful record of defining and developing market-leading sensor interface solutions.

Responsibilities

What You'll Do

  • Collaborate with marketing and customers to define system-level requirements and IC specifications.
  • Propose innovative and creative solutions to achieve the required specifications.
  • Design and verify digital circuits using HDL languages (Verilog, SystemVerilog, VHDL).
  • Perform synthesis and design-for-test (DFT) implementation.
  • Collaborate on block integration in complex mixed-signal designs.
  • Write design documentation and test plans.
Qualifications

What We're Looking For

  • MS or BS in Electrical Engineering, Computer Science, or a related field.
  • 10+ years of professional experience in digital design and/or verification.
  • Solid understanding of digital design principles.
  • Proficiency in HDL languages – Verilog, SystemVerilog, or VHDL.
  • Knowledge of functional verification concepts, especially UVM.
  • Willing and able to learn new subjects, and grow in technical expertise.
  • Good communication skills in English (written and spoken).
  • Eligibility to work in the Czech Republic.

Preferred Skills

  • Experience in SoC design flow – RTL design, simulation, verification DFT, signoff.
  • Understanding of SystemVerilog behavioral modeling.
  • Awareness of EMC design considerations.

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